? semiconductor components industries, llc, 2016 july, 2016 ? rev. 9 1 publication order number: MC10E101/d MC10E101, mc100e101 5v?ecl quad 4\input or/nor gate description the mc10e/100e101 is a quad 4-input or/nor gate. the 100 series contains temperature compensation. features ? 500 ps max. propagation delay ? pecl mode operating range: ? v cc = 4.2 v to 5.7 v with v ee = 0 v ? necl mode operating range: ? v cc = 0 v with v ee = ? 4.2 v to ? 5.7 v ? internal input 50 k pulldown resistors ? esd protection: ? human body model; > 2 kv ? machine model; > 200 v ? meets or exceeds jedec spec eia/jesd78 ic latchup test ? moisture sensitivity: level 3 (pb-free) ? flammability rating: ? ul 94 v ? 0 @ 0.125 in, oxygen index: 28 to 34 ? transistor count = 115 devices ? these devices are pb-free, halogen free and are rohs compliant marking diagram* xxx = 10 or 100 a = assembly location wl = wafer lot yy = year ww = work week g = pb-free package plcc ? 28 fn suffix case 776 ? 02 www.onsemi.com mcxxxe101fng awlyyww *for additional marking information, refer to application note and8002/d . ordering information device package shipping ? MC10E101fnr2g plcc ? 28 (pb-free) 500/tape & reel mc100e101fnr2g plcc ? 28 (pb-free) 500/tape & reel ?for information on tape and reel specifications, in- cluding part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d .
MC10E101, mc100e101 www.onsemi.com 2 all v cc and v cco pins are tied together on the die. v cco d 0a d 0b d 0c d 0d d 1a d 1b 5 v cco d 2d d 2c d 2b v ee d 2a d 1d d 1c 26 27 28 2 3 4 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 67 8910 d 3a d 3b d 3c d 3d q 3 q 3 q 2 q 2 v cc q 1 q 1 q 0 q 0 1 warning: all v cc , v cco, and v ee pins must be externally connected to power supply to guarantee proper operation. figure 1. 28-lead pinout: assignment (top view) d 0a d 0b d 0c d 0d d 1a d 1b d 1c d 1d d 2a d 2b d 2c d 2d d 3a d 3b d 3c d 3d q 0 q 0 q 1 q 1 q 2 q 2 q 3 q 3 figure 2. logic diagram table 1. pin description pin function d 0a ? d 3d ecl data inputs q 0 ? q3, q 0 ? q 3 ecl differential outputs v cc , v cco positive supply v ee negative supply table 2. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc pecl mode power supply v ee = 0 v 8 v v ee necl mode power supply v cc = 0 v ? 6 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 ? 6 v i out output current continuous surge 50 100 ma t a operating temperature range 0 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction-to-ambient) 0 lfpm 500 lfpm plcc ? 28 63.5 43.5 c/w jc thermal resistance (junction-to-case) standard board plcc ? 28 22 to 26 c/w t sol wave solder (pb-free) 265 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected.
MC10E101, mc100e101 www.onsemi.com 3 table 3. 10e series pecl dc characteristics (v cc = 5.0 v, v ee = 0.0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 23 30 40 23 30 40 23 30 40 ma i ee power supply current 30 36 30 36 30 36 ma v oh output high voltage (note 2) 3980 4070 4160 4020 4105 4190 4090 4185 4280 mv v ol output low voltage (note 2) 3050 3210 3370 3050 3210 3370 3050 3227 3405 mv v ih input high voltage 3830 3995 4160 3870 4030 4190 3940 4110 4280 mv v il input low voltage 3050 3285 3520 3050 3285 3520 3050 3302 3555 mv i ih input high current 150 150 150 a i il input low current 0.5 0.3 0.5 0.25 0.3 0.2 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . v ee can vary ? 0.46 v / +0.06 v. 2. outputs are terminated through a 50 resistor to v cc ? 2.0 v. table 4. 10e series necl dc characteristics (v ccx = 0.0 v; v ee = ? 5.0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 30 36 30 36 30 36 ma v oh output high voltage (note 2) ? 1020 ? 930 ? 840 ? 980 ? 895 ? 810 ? 910 ? 815 ? 720 mv v ol output low voltage (note 2) ? 1950 ? 1790 ? 1630 ? 1950 ? 1790 ? 1630 ? 1950 ? 1773 ? 1595 mv v ih input high voltage ? 1170 ? 1005 ? 840 ? 1130 ? 970 ? 810 ? 1060 ? 890 ? 720 mv v il input low voltage ? 1950 ? 1715 ? 1480 ? 1950 ? 1715 ? 1480 ? 1950 ? 1698 ? 1445 mv i ih input high current 150 150 150 a i il input low current 0.5 0.3 0.5 0.065 0.3 0.2 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . v ee can vary ? 0.46 v / +0.06 v. 2. outputs are terminated through a 50 resistor to v cc ? 2.0 v. table 5. 100e series pecl dc characteristics (v ccx = 5.0 v; v ee = 0.0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 30 36 30 36 35 42 ma v oh output high voltage (note 2) 3975 4050 4120 3975 4050 4120 3975 4050 4120 mv v ol output low voltage (note 2) 3190 3295 3380 3190 3255 3380 3190 3260 3380 mv v ih input high voltage 3835 3975 4120 3835 3975 4120 3835 3975 4120 mv v il input low voltage 3190 3355 3525 3190 3355 3525 3190 3355 3525 mv i ih input high current 150 150 150 a i il input low current 0.5 0.3 0.5 0.25 0.5 0.2 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . v ee can vary ? 0.46 v / +0.8 v. 2. outputs are terminated through a 50 resistor to v cc ? 2.0 v.
MC10E101, mc100e101 www.onsemi.com 4 table 6. 100e series necl dc characteristics (v ccx = 0.0 v; v ee = ? 5.0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 30 36 30 36 35 42 ma v oh output high voltage (note 2) ? 1025 ? 950 ? 880 ? 1025 ? 950 ? 880 ? 1025 ? 950 ? 880 mv v ol output low voltage (note 2) ? 1810 ? 1705 ? 1620 ? 1810 ? 1745 ? 1620 ? 1810 ? 1740 ? 1620 mv v ih input high voltage ? 1165 ? 1025 ? 880 ? 1165 ? 1025 ? 880 ? 1165 ? 1025 ? 880 mv v il input low voltage ? 1810 ? 1645 ? 1475 ? 1810 ? 1645 ? 1475 ? 1810 ? 1645 ? 1475 mv i ih input high current 150 150 150 a i il input low current 0.5 0.3 0.5 0.25 0.5 0.2 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . v ee can vary ? 0.46 v / +0.8 v. 2. outputs are terminated through a 50 resistor to v cc ? 2.0 v. table 7. ac characteristics (v ccx = 5.0 v; v ee = 0.0 v or v ccx = 0.0 v; v ee = ? 5.0 v (note 1)) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max f max maximum toggle frequency 700 700 700 mhz t plh t phl propagation delay to output d to q 300 450 600 300 450 600 300 450 600 ps t skew within-device skew (note 2) within-gate skew (note 3) 50 25 50 25 50 25 ps t jitter random clock jitter (rms) < 1 < 1 < 1 ps t r t f rise/fall time (20 - 80%) 275 380 575 300 380 575 275 380 575 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. 10 series: v ee can vary ? 0.46 v / +0.06 v. 100 series: v ee can vary ? 0.46 v / +0.8 v. 2. within-device skew is defined as identical transitions on similar paths through a device. 3. within-gate skew is defined as the variation in propagation delays of a gate when driven from its different inputs.
MC10E101, mc100e101 www.onsemi.com 5 figure 3. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = v cc ? 2.0 v resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
MC10E101, mc100e101 www.onsemi.com 6 package dimensions 28 lead pllc case 776 ? 02 issue f ? n ? ? m ? ? l ? v w d d y brk 28 1 view s s l-m s 0.010 (0.250) n s t s l-m m 0.007 (0.180) n s t 0.004 (0.100) g1 g j c z r e a seating plane s l-m m 0.007 (0.180) n s t ? t ? b s l-m s 0.010 (0.250) n s t s l-m m 0.007 (0.180) n s t u s l-m m 0.007 (0.180) n s t z g1 x view d ? d s l-m m 0.007 (0.180) n s t k1 view s h k f s l-m m 0.007 (0.180) n s t notes: 1. datums -l-, -m-, and -n- determined where top of lead shoulder exits plastic body at mold parting line. 2. dimension g1, true position to be measured at datum -t-, seating plane. 3. dimensions r and u do not include mold flash. allowable mold flash is 0.010 (0.250) per side. 4. dimensioning and tolerancing per ansi y14.5m, 1982. 5. controlling dimension: inch. 6. the package top may be smaller than the package bottom by up to 0.012 (0.300). dimensions r and u are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 7. dimension h does not include dambar protrusion or intrusion. the dambar protrusion(s) shall not cause the h dimension to be greater than 0.037 (0.940). the dambar intrusion(s) shall not cause the h dimension to be smaller than 0.025 (0.635). dim min max min max millimeters inches a 0.485 0.495 12.32 12.57 b 0.485 0.495 12.32 12.57 c 0.165 0.180 4.20 4.57 e 0.090 0.110 2.29 2.79 f 0.013 0.021 0.33 0.53 g 0.050 bsc 1.27 bsc h 0.026 0.032 0.66 0.81 j 0.020 --- 0.51 --- k 0.025 --- 0.64 --- r 0.450 0.456 11.43 11.58 u 0.450 0.456 11.43 11.58 v 0.042 0.048 1.07 1.21 w 0.042 0.048 1.07 1.21 x 0.042 0.056 1.07 1.42 y --- 0.020 --- 0.50 z 2 10 2 10 g1 0.410 0.430 10.42 10.92 k1 0.040 --- 1.02 ---
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